1. Field of the Invention
The present invention relates to an electronic device, and in particular to an electronic device implemented in integrated technology.
2. Description of Prior Art
For utilization in switching circuits of high-frequency and/or maximum-frequency technology, devices having a highly non-linear characteristic curve are often required. Here, a semiconductor metal contact whose semiconductor material is not too highly doped is advantageous, in particular, since such a contact exhibits the highly non-linear characteristic curve necessary for circuit design. Such a semiconductor metal contact, which is also referred to as Schottky diode, therefore is suitable, due to the highly non-linear diode characteristic curve, in particular as a rectifier element with extremely high frequencies and as a majority carrier device, since the stored-charge effects caused by minority carriers are insignificant.
A fundamental problem associated with Schottky diodes is the occurrence of parasitic currents beyond the edge area of the diode. The parasitic current here results from a superposition of several different conducting mechanisms as are illustrated, by way of example, in FIG. 2.
However, such conducting mechanisms do not only occur with Schottky diodes but also with other devices. Without limiting the general applicability, the description that follows will show, using the example of a Schottky diode, the conducting mechanisms leading to parasitic currents.
FIG. 2 initially shows a semiconductor 200 including, for example, n-doped silicon having a doping concentration of <1018 cm−3. In addition, an insulator 202, for example silicon dioxide, is arranged on semiconductor 200, so that part of the surface of the semiconductor 200 is covered by the insulator 202. Moreover, a metal area 204 is arranged on the semiconductor 200 and on the insulator 202 such that the metal area 204 covers that area of the semiconductor 200 which is not covered by the insulator 202, and such that the metal area 204 at the same time covers an area of the surface of the insulator 202. Thus, a space-charge zone 206 is formed between the metal area 204 and the semiconductor 200, at the interface between the metal area 204 and the semiconductor 200. The useful current which has been set is given by an emission beyond the potential barrier between the metal area 204 and the semiconductor 200, as is represented by arrow 210 in FIG. 2. A significant portion of the parasitic current is caused by charge carriers which overcome the relatively thin potential barrier at the edge of the insulator, i.e. between the metal area (Schottky metal) 204 and the semiconductor 200. Such an effect (also referred to as tunneling effect) is represented by arrow 208 in FIG. 2. In addition, conducting channels contribute to a parasitic current beyond the edge of the diode by means of minority-charge carriers in the edge area of the space-charge zone (i.e. in that area of the space-charge zone 206 which is arranged in a vicinity of insulator 202).
In addition, leakage currents due to stronger electric fields are also known, which may lead to a reduction of the height of the Schottky barrier at the edge of the diode in the cylindrically or spherically curved portions of the space-charge zone. By suitably processing the Schottky diode, these leakage currents may, however, be kept small in comparison with the useful current. In particular, a pn-diode guard ring is often embedded into the semiconductor 200 to this end, the metal area 204 partly covering the pn-diode guard ring. Hereby, a parasitic current extending beyond the edge of the diode is minimized, since the pn-diode guard ring implements a rise in the potential barrier between the metal area 204 and the semiconductor 200 at the edge area of the Schottky diode.
However, the pn-diode guard ring proves problematic in that, as a consequence, the Schottky diode has an additional portion of parasitic capacitance. The additional portion of parasitic capacitance of the pn-diode guard ring is defined, in particular, by its lateral extension as well as its vertical extension in the semiconductor 200. To be able to use a Schottky diode for high-frequency and/or microwave applications, however, it is necessary to keep the level of the Schottky diode's parasitic capacitances particularly small in relation to the pure space-charge zone capacity of the Schottky diode. In practice it has been found that a pn-diode guard ring which was produced by means of a photolithographic method exhibits lateral and vertical dimensions that are too large, and thus does not exhibit sufficiently small parasitic capacitances, so that those Schottky diodes which are equipped with a pn-diode guard ring are not suitable for high-frequency and/or microwave applications. To manufacture Schottky diodes that will meet the requirements of utilization in high-frequency or microwave applications, the pn-diode guard ring is therefore mostly dispensed with. As a consequence, however, the above-described parasitic currents extending beyond the edge of the diode will occur, which will negatively impact the electrical performance of the device in high-frequency applications.
To sufficiently minimize the arising parasitic currents at the edge of the Schottky diode, e.g. two lithography levels are required for insulating and defining the active Schottky area (i.e. that area of the Schottky diode in which a semiconductor metal contact exists), a guard ring not being provided for in this application (see US 06060757 A). In addition to giving rise to adjustment tolerances negatively impacting the design rules, this also leads to high cost due to the diode being processed at several lithography levels. As a consequence, designs suitable for microwaves very soon reach limits to implementation for technological and cost reasons.
A further approach to minimizing the parasitic currents is to configure guard rings around the active Schottky area (see, for example, US 04261095 A, US 04063964 A, US 03820235 A, US 04209350 A, US 05418185 A, US 05696025 A, US 04414737 A, US 04796069 A, US 04209349 A, US 03907617 A, US 04691435 A, US 05907179 A, US 06191015 A, US 06060757 A). Some of these approaches, however, have the drawback that they partly require high thermal expense, which leads to a deterioration of the series resistance of the cathode terminal due to outdiffusion of dopants from the mostly highly doped cathode terminal into neighboring low-doped areas. Other approaches cannot be employed for high-frequency and/or microwave applications, since the lateral dimensions of the guard ring, and therefore the parasitic capacitances, are too large. Yet other approaches are not suitable for utilization in Schottky diodes, since these approaches lead to dry etching on the semiconductor area which will be active later on, which would compromise the diode properties of this Schottky diode. In addition, in existing technology, the semiconductor 200 is removed outside of the active Schottky area to avoid parasitic capacitances of the terminal contacts of the semiconductor 200 and of the metal area 204. Subsequently, the active Schottky area is defined on the island of the semiconductor arising after the semiconductor material has been removed, this being time-consuming and expensive, however, since two additional lithography levels are required for this process.
Similar problems with regard to parasitic capacitances, as arise with Schottky diodes, also present themselves with further electronic devices, such as highly sensitive sensors of small dimensions.